AMD Ryzen 3000 Architecture

AMD Ryzen 3000 Architecture

The Ryzen 3000 series, based on the Zen 2 architecture, was a landmark release for AMD. It was the first consumer CPU to use a chiplet design, where the processor is made up of multiple smaller chips instead of one large monolithic die. This approach allowed AMD to scale core counts and reduce costs in ways that Intel could not match at the time.

A Ryzen 3000 CPU consists of two types of chiplets. The compute chiplets, called CCDs or Core Complex Dies, contain the CPU cores. Each CCD has up to 8 cores and is manufactured on a 7nm process. The I/O die, or IOD, contains the memory controller, PCIe controller, and Infinity Fabric interface. The IOD is manufactured on a larger 12nm process because it does not benefit as much from the smaller node.

The cores in Zen 2 are organized into groups of four called CCXs, or Core Complexes. Each CCX has 4 cores sharing 16 MB of L3 cache. A CCD contains two CCXs for a total of 8 cores and 32 MB of L3 cache. The cores communicate with each other through the Infinity Fabric, which connects the CCXs within a CCD and also connects multiple CCDs to the I/O die.

Zen 2 brought a significant IPC improvement over Zen+, roughly 15 percent. This came from improvements to the branch predictor, larger caches, and a wider execution engine. The architecture also added support for PCIe Gen 4, which was a first for consumer platforms. This allowed for faster SSDs and GPUs, giving AMD a feature advantage over Intel.

The chiplet design had one downside: latency. Communication between chiplets across the Infinity Fabric adds delay compared to a monolithic design. This meant that Ryzen 3000 had higher core-to-core latency than Intel's monolithic chips. In gaming, this could cause slight performance penalties, especially in older games that were not optimized for the chiplet architecture. Later generations would improve on this significantly.